Digital Coded Squelch (DCS) codec part II

In the previous DCS article I presented a general overview of the technology together with the problems that an implementer of the decoder may fight with. In this article I will present the functional blocks of the decoder and how they interact each other. The complete information could be gathered from the implementation which is presented as open source packages in the end of the article.

Building blocks:


The goal of the project was set to decode the DCS signal in noisy conditions, having distorted signal and accepting a broad range of audio volume level. In the following sub-chapters each block is presented.

Aquisition of signal

ALSA is used for aquisition of signal at the sampling rate of 8Khz and S16_LE format. Note that libdcscodec uses a buffer as input and does not depend on ALSA or other input method. The acquired signal is looking like in the following picture:

LP Filter

The Low Pass Filter is implemented as a FIR filter and is designed using Parks-McClellan algorithm for optimum approximation of a generalized linear phase systems. Basically the algorithm aims for equiripple in both passband and stopband of the filter. The filter is designed to have maximum ripple as 0.5dB and 60dB attenuation in stopband. Giving this numbers together with the Fp=84.4Hz and Fs=134.4hz, parks McClellan algorithm will calculate a filter with order n=357 which is quite high and therefore the filter is a Type II FIR filter.

The signal after LP filtering is presented below:

DC filter

This filter is actually a combination of a differentiator followed by an integrator having therefore the differential equation like the following: y(t) = x(t) – x(t-1) +ay(t-1).  Its need comes from the observation that the signal from the receiver seems to be shifted up or below the zero level line. The coefficient a could be tweaked in order to adjust to the cut-on frequency.

Resample

Just to recap the input data we have, the sampling frequency is 8khz and the DCS signal has a rate of 134.4Hz. In order to correctly process the data and be able to find the moments when a switch from “0” to “1” and “1” to “0” is done, we must have a sampling frequency which is multiple of the 134.4Hz rate. That is why resampling is needed and the resampled rate is chosen 8*134.4Hz. Therefore we will have 8 samples per symbol. Resampling has been implemented using the SRC library which works very well and gives the proper results. However I plan to implement my own resampling function just to reduce the code size of the DCS codec.

Integrate and Dump

From the theory of digital communication it is know that a matched filter could be used to reduce the ISI (Inter Simbol Interference) and therefore to increase the BER. Integrate and dump is a simple matched filter that works by integrating (adding) the samples through a period, use the result, dump the result and then start all over. In our case the integration is done in a period of eight samples T=8*1/134.4[s] and therefore taking in consideration the new sampling frequency.

There is a discussion here regarding the start of the sampling period. In an optimum case the sampling period should have the peak of signal at its center so that the integrate and dump method should work proper. However, there is no clear start and stop for this integrating period and one big question arises: when to start the integrate period? Some methods have been developed for that among them being the “early late gate” which uses three samples in order to determine the proper start of the integrating period. However, what I’m currently doing is integrating the signal considering each of the 8th samples as starting point for the integration process. Each result of the integration will be sent to the detector algorithms and redundant data is eliminated. I know this is not optimum and this is one of the points to be changed in the near future.

AGC

One of the goals of making the DCS codec is to be able to use a broad range of audio volume level. This is important because the soundcard may have preamplifiers or dividers and also the radio receiver may output different audio level from discriminator. The AGC block is not properly an Automatic Gain Control but it is a mean to determine the threshold level above which the signal is considered to be a peak by the peak detector. The threshold level is calculated using the standard deviation (std) of a signal over the entire buffer.  See the source code for the implementation.

Peak detector

As previously stated, the peak detector is used to determine signal’s peaks and therefore the transition form “0” to “1” and “1” to “0”. Starting with a peak, the next peak should be at a time distance of k*1/134.4[s] with k being integer.  After the peak detector a bitstream of “0” and “1” will be output to the next processing block.

Golay decode

having the bitstream from peak detector as an input, this block does calculate the check bits taking in consideration the new arrived bit. If the calculated check bits match with the received check bits then we have a match and the corresponding Golay is looked up in a table containing all Golay codes.  The “standard” Golay code is taken from the table and then send to the next processing block.

Display of DCS code

This is simple console display of the DCS code. One more thing is done, due to the fact that polarity of the signal is not known by the software both positive and negative polarity codes are presented. It is users responsibility to decide which code to take in consideration. Normally the polarity should be communicated by the user of the transmitter.

Practical results

The tests were done using a Yaesu FT-857D as receiver and a Yaesu VX-7R portable as transmitter. All the above graphics were saved from the program and exported using gnuplot.

One interesting point to note regarding the VX-7R is when the portable is enabled as dual receive. It seems the DCS code it sends on transmission is the selected one together with another random code.

TODO

– optimize buffer utilization

– use own resampling method

– use early-late gate method for determining the proper start of integration

– implement transmitter

– optimize for embedded processors with no floating point

Sourcecode released as Open Source under GNU GPL license:

library that implements DCS codec – libdcscodec.tar.gz

test program for libdcscodec – dcscodec.tar.gz

libresample package needs to be installed in your system as it is a dependency.

One thought on “Digital Coded Squelch (DCS) codec part II

Leave a Reply

Your email address will not be published. Required fields are marked *


*

You may use these HTML tags and attributes: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <strike> <strong>